System Interconnect Design – Allegro & OrCAD
Familiar with digital and analog circuit design methodology
A working knowledge of PCB signal analysis and transmission line theory
After completing this course, you will be able to:
- Create, extract, and explore topologies
- Run solution space analysis
- Create an electrical constraint set
- Apply constraints to drive placement and routing
- Run postroute DRC check
- Use template revision to update the ECSet applied to the nets
- Analyze the routed board design for signal integrity
- Create a DesignLink between boards and use it to run multiboard simulation
Day 1
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Allegro PCB SI design flow
- Board setup requirements
- DC net connections
- Model assignment
- Default and discrete models
- Model integrity
- IBIS to DML translation
Day 2
- Net extraction
- SigXplorer basics
- Simulation with SigXplorer
- Sweep simulations
- Trace models
- Constraint floorplanning
- Constraint DRCs
Day 3
-
DRC routing
-
Creating a DesignLink
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System analysis
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Postroute analysis
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Reflection and crosstalk simulation
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Postroute bus analysis
-
Differential pairs